"Government Launches Semicon 2.0 Scheme to Strengthen India's Semiconductor Ecosystem"
Semiconductor
a material (typically silicon) whose electrical conductivity lies between a conductor and insulator, used to make chips and electronic components.
ATMP/OSAT
Assembly, Testing, Marking and Packaging / Outsourced Semiconductor Assembly and Test — the back-end segment of chip manufacturing after wafer fabrication.
Semiconductors are the foundational components of virtually every modern electronic device, from smartphones and automobiles to defence systems and medical equipment. A country's ability to design and manufacture chips is therefore a matter of both economic competitiveness and national security. India historically relied almost entirely on chip imports, leaving it exposed to the supply-chain disruptions that became globally visible during the COVID-19 pandemic, when a worldwide semiconductor shortage halted automobile and electronics production across continents.
To address this vulnerability, the government launched the India Semiconductor Mission (ISM) under the Semicon India Programme as the first structured policy push to build a domestic semiconductor ecosystem. ISM was established as a specialised and independent business division within the Digital India Corporation under the Ministry of Electronics and Information Technology (MeitY). The first programme offered fiscal support for chip fabrication, assembly, testing, marking and packaging (ATMP), and design. It also initiated talent development, recognising that hardware capability requires a deep pool of trained engineers, not just capital investment.
The broader global context matters here. The United States enacted the CHIPS and Science Act, the European Union launched its European Chips Act, and Japan, South Korea, and Taiwan have all deepened state support for their semiconductor industries. India's policy trajectory is part of this worldwide reassertion of industrial policy in strategic technology sectors.
Semicon 2.0 builds on the first programme and formalises India's semiconductor ambition through a structured six-pillar framework covering ten categories across the full semiconductor value chain.
Pillar 1 (Design) covers three categories: design of semiconductor intellectual property (IPs), chips, and System-on-Chips (SoCs) for national importance and strategic priorities; design for the commercial sector; and a Deployment-Linked Incentive (DLI) for semiconductor IPs, chips, and SoCs that reach actual commercial deployment. The DLI model is significant because it ties incentives to market adoption, not just development, reducing the risk of subsidising designs that never reach production.
Pillar 2 (Machines and Materials) targets the semiconductor manufacturing ecosystem, the upstream supply of specialised equipment and raw materials such as silicon wafers, photoresists, and process chemicals. This is a critical gap: even countries with fabs depend on a narrow set of suppliers for equipment, and building domestic capacity here reduces a different layer of import dependence. …
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'The emergence of Fourth Industrial Revolution (Digital Revolution) has initiated e-Governance as an integral part of government.' Discuss.
Consider the following statements regarding Semicon 2.0:
1.The India Semiconductor Mission (ISM) is the nodal agency for implementing Semicon 2.0.
2.Semicon 2.0 is structured around six pillars covering twelve categories.
3.C-DAC may assist ISM in implementing design and deployment categories.
4.Projects supported under Semicon 2.0 generally have a duration of up to six years.
How many of the above statements are correct?
Match the following pillars of Semicon 2.0 with their primary focus areas:
Pillar — Focus Area
1.Pillar 1 — (a) Semiconductor Assembly, Testing, Marking and Packaging
2.Pillar 2 — (b) Design of Semiconductor IPs, Chips, and SoCs
3.Pillar 4 — (c) Semiconductor manufacturing ecosystem (machines and materials)
4.Pillar 5 — (d) R&D for advanced semiconductor technologies
Which of the following is the correct matching?
With reference to the Deployment-Linked Incentive (DLI) under Semicon 2.0, consider the following statements:
1.DLI provides fiscal support linked to the commercial deployment of semiconductor IPs, chips, and SoCs, not merely their design.
2.DLI is part of Pillar 3 (Fabs) of Semicon 2.0.
3.The DLI model is intended to reduce the risk of subsidising designs that never reach commercial production.
Which of the statements given above is/are correct?
Consider the following statements about India's semiconductor talent development under the Semicon India Programme:
1.India achieved its target of training 85,000 semiconductor engineers in four years, against an original ten-year target.
2.Students from Tier-II and Tier-III cities have designed more than 250 chips under the programme.
3.Semicon 2.0 has set a new target of developing two lakh additional semiconductor engineers.
Which of the statements given above is/are correct?
Which of the following types of semiconductor fabs are covered under Pillar 3 of Semicon 2.0?
1.Silicon Semiconductor Wafer Fabs
2.Compound Semiconductors and Photonics Fabs
3.Display Fabs
4.ATMP/OSAT Facilities
Select the correct answer using the codes below:
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