S&TGS3

India positioned as trustworthy chipmaking destination amid supply‑chain risks

The Hindu, Indian Express, PIB·2026-09-18

"India positioned as trustworthy chipmaking destination amid supply‑chain risks"

Prelims Facts

  • •Semicon 2.0 has a headline fiscal outlay of ₹1.27 lakh crore.
  • •The India Semiconductor Mission (ISM) operates as the nodal agency under MeitY for Semicon 2.0.
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Key Terms

India Semiconductor Mission (ISM)

Nodal body under MeitY that implements India's semiconductor policy programmes.

Deployment-Linked Incentive (DLI)

Subsidy that reimburses a share of net sales to support early chip production and market creation.

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Study Note

BackgroundCore Concept

Background

Semiconductors are foundational inputs for modern electronics, communications, defence systems, electric mobility, and artificial intelligence. India historically depended on global value chains for chip design, fabrication, and equipment, creating strategic vulnerability when supply lines tightened. The government created a focused implementation body, the India Semiconductor Mission (ISM) under the Ministry of Electronics and Information Technology (MeitY), to coordinate a national response. The first phase, Semicon India 1.0, had an outlay of ₹76,000 crore and provided a launchpad for design and downstream activities. Building on early traction in mobile manufacturing and electronics exports, policymakers designed a larger follow-up programme to deepen domestic capability across the entire value chain.

The upgraded policy, Semicon India 2.0, carries a headline fiscal envelope of ₹1.27 lakh crore. Its design reflects a key insight: no single country controls the entire semiconductor value chain. Countries specialise in chip design, fabrication, equipment and materials, memory, or assembly and testing. India's strategy therefore combines domestic capacity-building with trusted international partnerships for equipment, chemicals, and process know-how. The approach is phased: begin with design, assembly, testing, and packaging, then expand to advanced fabrication as clustered suppliers and equipment capabilities mature.

The Topic Explained

The semiconductor ecosystem spans six discrete layers. First is chip design, where fabless firms create intellectual property and circuit layouts. Second is fabrication, where wafers are produced at target process nodes. Third is advanced packaging and testing, which integrates dies and interconnects into finished systems. Fourth are enabling industries covering equipment, chemicals, gases, and specialised materials. Fifth is applied research and development. Sixth is talent development. Semicon 2.0 organises interventions around these six pillars to address specific market failures: high capital costs in fabs, long gestation periods for equipment suppliers, and skills gaps in VLSI design and EDA toolchains.

A central demand-side instrument is the Deployment-Linked Incentive (DLI), which reimburses a share of net sales for supported products. This creates buyer confidence and helps early production achieve revenue viability. For chip design, the policy runs three tracks. The strategic track covers chips for sensitive national infrastructure, with restricted ownership and joint IP arrangements. …

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Related PYQs

2026GS1 Prelims

Which one of the following pairs of semiconductor plants in India and their locations is not correctly matched?

ACG Power and Industrial Solutions Pvt. Ltd. in partnership with Renesas Electronics and STARS Microelectronics : Gujarat
BTata Semiconductor Assembly and Test Pvt. Ltd. : Assam
CHCL-Foxconn Joint Venture India Chip Ltd. : Madhya Pradesh
DSicSem Pvt. Ltd. : Odisha
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2025GS3 Mains

2025 GS3: India aims to become a semiconductor manufacturing hub. What are the challenges faced by the semiconductor industry in India? Mention the salient features of the India Semiconductor Mission.

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Practice MCQs

S&Tmedium

Consider the following statements about Semicon 2.0: 1. The programme has a fiscal outlay of ₹1.27 lakh crore. 2. The Deployment‑Linked Incentive (DLI) reimburses 9% of net sales for five years. 3. Capex support for qualifying fabs is uniformly 50% of project cost. Which of the above are correct?

A1 and 2 only
B2 and 3 only
C1 and 3 only
D1, 2 and 3
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S&Teasy

Which of the following institutions are explicitly named as implementing or supporting Semicon 2.0? 1. India Semiconductor Mission (ISM) 2. Ministry of Electronics and Information Technology (MeitY) 3. Centre for Development of Advanced Computing (C‑DAC). Choose the correct answer.

A1 and 2 only
B2 and 3 only
C1 and 3 only
D1, 2 and 3
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S&Tmedium

Match the Design‑track (Column A) with its feature (Column B). Column A: a. Strategic track b. Commercial track c. Deployment track. Column B: 1. Restricted to Indian‑citizen ownership with joint IP arrangements. 2. Seed funding for fabless start‑ups and OCI eligibility. 3. Sales‑linked reimbursement to create buyers (DLI).

Aa‑1, b‑2, c‑3
Ba‑2, b‑1, c‑3
Ca‑3, b‑2, c‑1
Da‑1, b‑3, c‑2
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S&Teasy

Assertion (A): Building a domestic semiconductor ecosystem reduces risks from weaponised supply chains. Reason (R): Semicon 2.0 includes strategic measures that restrict ownership and manage IP for sensitive chips. Choose the correct answer.

ABoth A and R are true and R explains A
BBoth A and R are true but R does not explain A
CA is true but R is false
DA is false but R is true
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S&Tmedium

Which of the following investment announcements were reported as linked to India’s expanding semiconductor ecosystem? 1. Applied Materials committed $5 billion for R&D and supply chain expansion. 2. Lam Research announced a ₹10,000 crore investment in a silicon component facility. 3. A memory maker began commercial production at Sanand. Which are correct?

A1 and 2 only
B2 and 3 only
C1 and 3 only
D1, 2 and 3
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